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Keywords: Memory Design Engineer, Location: Santa Clara, CA

Page: 2

CPU Top-Level Design Verification Engineer

Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower... design, cache hierarchies, and memory systems RTL development - Experience creating efficient, synthesizable RTL code...

Company: Apple
Location: Santa Clara, CA
Posted Date: 17 Sep 2025

Formal Design Verification Engineer

base for all our IP. We are looking for a design verification engineer in the Dram Controller IP at AMD's Penang Design..._ THE ROLE: The Graphic Memory Controller(GMC) is an IP that delivers into all SOCs that are shipped by AMD's Radeon...

Posted Date: 05 Sep 2025

IC Package Design Engineer

. Description - Implement the physical design of packages and modules for SoC, Memory, RF, and cellular chips. - Interface and coordinate... As the IC Package Design Engineer, you demonstrate fundamental knowledge or proven experience in the following: Proven...

Company: Apple
Location: Santa Clara, CA
Posted Date: 04 Sep 2025

Senior Design Engineer, Coherent High Speed Interconnect

NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA... visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 04 Sep 2025

ASIC Design Engineer

NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA... platforms of tomorrow. What you'll be doing: As a member of our Memory Subsystem Design team, you will collaborate...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Aug 2025
Salary: $108000 - 184000 per year

Data Center Optical Transceiver Design and System Validation Engineer

_ THE ROLE: We are looking for a Senior Engineer to lead the design, qualification, and system-level testing of data... transceiver design, qualification plans, including electrical, optical, and system-level validation Perform compliance...

Posted Date: 21 Aug 2025

Senior ASIC Design Engineer

NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world’s leading SoC's and GPU... for the micro-architecture and design implementation of GPU memory subsystem modules. Make architectural trade-offs based...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 31 Jul 2025

Senior SoC Design Engineer

for compute, fabric, memory, and attached devices. Strong background in RTL design developing high-speed digital blocks... to do their best work. Come join the team and see how you can make a lasting impact on the world. Join NVIDIA as a Senior SoC Design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 16 Jul 2025

ASIC Design Engineer - Cache Controller

of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system... with physical design team on the timing closure of the cache subsystem. Minimum Qualifications In-depth knowledge of memory...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025
Salary: $126800 - 190900 per year

ASIC Design Engineer - Cache Controller

of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system... design experience in: o memory system development o RTL/micro-architecture definition o PPA (performance/power/area...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

ASIC Design Engineer - Cache Controller

of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system... design experience in: o memory system development o RTL/micro-architecture definition o PPA (performance/power/area...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Physical Design Engineer Intern - Master's Degree

the most difficult design problems in the areas of AI, data movement, memory/storage, switch, networking, security..., and other infrastructure applications. The Marvell Physical Design team is located in our Santa Clara, CA office, and has a long history...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 25 Sep 2025
Salary: $27 - 55 per hour

SRAM Circuit Design Engineer

and high performance. Knowledge of Cache design/architecture, memory hierarchy is a huge plus. Working knowledge of RTL...Do you have a passion for crafting entirely new solutions? Be a part of a world-class silicon design team...

Company: Apple
Location: Santa Clara, CA
Posted Date: 17 Aug 2025

Design for Manufacturing Technologist

volume manufacturing, focusing on design-process co-optimization to maximize performance, power, and area (PPA) benefits... across diverse foundry customer applications Drive Design for Manufacturability (DFM) strategies across CMOS technology platforms...

Company: Intel
Location: Santa Clara, CA
Posted Date: 09 Oct 2025

CPU Micro-architect/RTL Designer

Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture... specification. RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 24 Sep 2025

DDr5 verification design ENG - Santa Clara, CA - AMDJP00004484

Hi Role : ASIC/RTL Design Engineer Location : Santa Clara, CA Contract THE ROLE: We are looking for an adaptive..., self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading...

Company: Seneca Resources
Location: Santa Clara, CA
Posted Date: 20 Sep 2025

Senior Staff Software Engineer - (Backend C++)

Company Description It all started in sunny San Diego, California in 2004 when a visionary engineer, Fred Luddy, saw... database platform using and contributing to the latest open-source technologies Analyze storage/memory/compute performance...

Company: ServiceNow
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Staff Software Engineer - (Backend C++)

Company Description It all started in sunny San Diego, California in 2004 when a visionary engineer, Fred Luddy, saw... database platform using and contributing to the latest open-source technologies Analyze storage/memory/compute performance...

Company: ServiceNow
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Principal Machine Learning Engineer (AI Agents)

We are seeking a Principal Software Engineer with deep expertise in designing, building, and scaling AI-powered platforms... to tackle complex, large-scale challenges and deliver impactful customer experiences. Lead the design, prototyping...

Location: Santa Clara, CA
Posted Date: 04 Oct 2025
Salary: $175000 - 215000 per year

Principal Machine Learning Engineer (AI Agents)

We are seeking a Principal Software Engineer with deep expertise in designing, building, and scaling AI-powered platforms... to tackle complex, large-scale challenges and deliver impactful customer experiences. Lead the design, prototyping...

Location: Santa Clara, CA
Posted Date: 03 Oct 2025
Salary: $175000 - 215000 per year