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Keywords: IP/SOC Verification Engineer, Location: Bangalore, Karnataka

Page: 6

Frond End Design- STA Engineer

closure for complex SoC and IP designs. You will use industry-standard EDA tools to optimize power, performance, and area (PPA... silicon. KEY RESPONSIBILITIES: Develop and implement power reduction strategies across SoC/IP design. Perform synthesis...

Posted Date: 15 Jan 2026

Principal Engineer, Physical Design

Job Details: Job Description: • Lead Structural Design / physical design Implementation of Custom IP and SoC designs..., reliability, and power and noise analysis. Conducts verification and signoff, including formal equivalence verification, static...

Company: Intel
Posted Date: 14 Jan 2026

Senior Engineer- RTL

with SoC / IP-level design Good understanding of synthesis and timing concepts Experience mentoring junior engineers Low...: 3–6 years of experience in RTL design Strong proficiency in Verilog / SystemVerilog Experience with SoC / IP-level...

Company: Quest Global
Posted Date: 09 Jan 2026

Senior Principal Engineer, RTL ASIC Design

Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors... guidance in floorplanning, power analysis, synthesis and timing signoff. Work with the verification team on pre-silicon...

Company: Marvell
Posted Date: 09 Jan 2026

Principal Engineer, RTL ASIC Design

. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich... with cross-functional teams, IP Vendors and customers Implement a specification using RTL coding techniques and best practices...

Company: Marvell
Posted Date: 07 Jan 2026

Infra NOC (RTL)Design Engineer-Staff/Sr Staff

for specification, design and implementation of interconnect and related IP's Actively work with SoC team, verification team, physical... of solid experience in IP/SoC design and micro-architecture Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE...

Company: Qualcomm
Posted Date: 05 Jan 2026

Lead RTL Design Engineer

&D teams such as Verification, digital IP, Design Enablement, Emulation, and Validation to achieve project milestones. Promote... in architecture, systems, emulation, SoC design, software, physical design, and IP teams developing key technical networks...

Posted Date: 30 Dec 2025

Security Engineer - Third party Assurance

and Disaster Recovery (BCDR) plans, including the verification of recent failover test results and tabletop exercises. Review... assessment standards (e.g., SOC 2, ISO 27001, SIG, CSA STAR). Excellent analytical and communication skills to translate...

Company: Cloudflare
Posted Date: 25 Dec 2025

GPU/DFT Logic Design Engineer

for a GPU required to generate DFT units, and the GPU IP block for integration in full chip designs. Participates actively... as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features...

Company: Intel
Posted Date: 20 Dec 2025

Senior Principal Engineer, Physical Design

infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the... for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing...

Company: Marvell
Posted Date: 13 Dec 2025

Senior SRAM Circuit Design Engineer

and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC... and see how you can make a lasting impact on the world! The Digital IP (DIP) group at NVIDIA is an organization of circuit design...

Company: Nvidia
Posted Date: 12 Dec 2025

Senior SRAM Circuit Design Engineer

and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC... and see how you can make a lasting impact on the world! The Digital IP (DIP) group at NVIDIA is an organization of circuit design...

Company: Nvidia
Posted Date: 12 Dec 2025

Senior SRAM Circuit Design Engineer

with internal SOC design, silicon testing, and productization teams that turn our IP into products that change the world. One of the.... Come join our diverse team and see how you can make a lasting impact on the world! The Digital IP (DIP) group at NVIDIA is an organization...

Company: Nvidia
Posted Date: 12 Dec 2025

Senior SRAM Circuit Design Engineer

and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC... and see how you can make a lasting impact on the world! The Digital IP (DIP) group at NVIDIA is an organization of circuit design...

Company: Nvidia
Posted Date: 12 Dec 2025

Network-on-chip/interconnect Design -Staff Engineer

Responsible for specification, Micro-Arch, design and verification of interconnect and related IP's Actively work with SoC... Architecture, verification, physical design team, Soc Floorplan, core teams and various other interconnect teams in various...

Company: Qualcomm
Posted Date: 11 Dec 2025

DV Engineer

Very good knowledge of Verilog/System Verilog and UVM. Candidate should have worked on IP verification - component..., AHB protocol is appreciated Exposure to SoC verification – test coding, debug Job Description: Candidate...

Company: Quest Global
Posted Date: 10 Dec 2025

Staff/Principal Engineer – ASIC Digital Design

of digital logic design, IP/SoC architecture and microarchitecture Experience Working knowledge of Synthesis, STA, Lint & CDC..., calibration logic, I3C/I2C protocol, interrupt controller, EEPROM, MCU integration etc. Work with Pre/Post-silicon verification...

Company: Micron
Posted Date: 05 Dec 2025

DV Engineer

Very good knowledge of Verilog/System Verilog and UVM. Candidate should have worked on IP verification - component..., AHB protocol is appreciated Exposure to SoC verification – test coding, debug Job Description: Candidate...

Company: Quest Global
Posted Date: 04 Dec 2025

Silicon - Performance Analysis Lead/Staff Engineer

Summary: Job Overview The candidate will be part of the SOC Infrastructure IP Performance modelling and analysis team.... Candidates need to work closely with IP architects and understand the feature design/arch and define the process/methodology...

Company: Qualcomm
Posted Date: 29 Nov 2025

Senior Principal Engineer

’s degree in CS/EE with 20+ years of relevant experience Strong background in IP and SoC verification methodologies... applications. What You Can Expect Lead the DV execution and sign-off for the entire IP, Subsystem and SoC Define and drive...

Company: Marvell
Posted Date: 22 Nov 2025