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Keywords: IP/RTL Design Engineer, Location: Bangalore, Karnataka

Page: 6

SV UVM

Job Requirements Design Verification Engineer Job Description Job Summary We are seeking a talented and detail...-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role in ensuring the...

Company: Quest Global
Posted Date: 17 Sep 2025

Technical Lead I - VLSI PD CAD

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture...

Company: UST
Posted Date: 13 Sep 2025

DV SV UVM

Job Requirements ob Title Design Verification Engineer Job Description Job Summary We are seeking a talented... and detail-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role...

Company: Quest Global
Posted Date: 04 Sep 2025

CPU/Cores Post Silicon Validation (Functional Validation)

_ MTS SILICON DESIGN ENGINEER THE ROLE: The AMD Cores System Validation team is seeking a dynamic and experienced Cores... cause; work with RTL and firmware engineers to resolve design defects and correct any test issues Review functional...

Posted Date: 21 Aug 2025

Associate II - VLSI SC Char

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 15 Aug 2025

Soc DFT Scan/ATPG Lead

_ SMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the S3 SoC DFT Team, the successful candidate will own the DFT... with the DFT Architecture and the various IP Design teams to align on the DFT requirements and successfully implementing the...

Posted Date: 15 Aug 2025

CPU/GPU Performance Modelling

through modeling and RTL simulation. This role will involve working with SoC, IP & Model architects to evaluate and debug CPU..._ SOC PERFORMANCE MODELING ENGINEER THE ROLE: The successful candidate will work in AMD's Client Performance Modeling...

Posted Date: 07 Aug 2025

Formal Verification Specialist

and AI platforms. IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building... on world class design IPs and SOCs for Server, Client and Graphics. Use the hardware architecture design and RTL...

Company: Intel
Posted Date: 05 Aug 2025

Associate II - VLSI

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 03 Aug 2025

Associate II - VLSI

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 03 Aug 2025

Lead MTS Verification Engineering

Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Lead MTS Design... Verification Engineer to join our Memory Controller IP team in Bangaluru, India. The successful candidate will participate in pre...

Company: Rambus
Posted Date: 30 Jul 2025