verification of new and existing features for AMD’s memory wrappers/RTL, resulting in no bugs in the final design. Additionally...; work with RTL and memory engineers to resolve design defects and correct any test issues Review functional and code...
features for AMD’s memory wrappers/RTL, resulting in no bugs in the final design. Additionally, creating a system... of Verilog/RTL, liberty files, spice simulation, and ASIC design flows Working knowledge of AI integration into various...
and architecture at micro-architecture, L2/L3 cache design hierarchy, and core complex CCX-level. Understands physical design and RTL... solving, and soft collaboration skills. This is an ideal role for the ambitious engineer who: is passionate about the power...
and architecture at micro-architecture, L2/L3 cache design hierarchy, and core complex CCX-level. Understands physical design and RTL... collaboration skills. This is an ideal role for the ambitious engineer who: is passionate about the power and performance domain...