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Keywords: FPGA Design Verification Engineer, Location: Bangalore, Karnataka

Page: 5

Software Development Lead

: We are looking for a highly motivated Senior RTL Design Engineer to join our SoC/ASIC/FPGA development team. The role involves end-to-end RTL... candidate will work closely with architecture, verification, physical design, and validation teams. Location :- Bangalore Key...

Company: Accenture
Posted Date: 30 Oct 2025

Software Development Lead

: We are looking for a highly motivated Senior RTL Design Engineer to join our SoC/ASIC/FPGA development team. The role involves end-to-end RTL... candidate will work closely with architecture, verification, physical design, and validation teams. Location :- Bangalore Key...

Company: Accenture
Posted Date: 30 Oct 2025

Associate II - VLSI

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills...

Company: UST
Posted Date: 29 Oct 2025

Associate II - VLSI DFT

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills...

Company: UST
Posted Date: 14 Oct 2025

Associate II - VLSI DFTN

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills...

Company: UST
Posted Date: 13 Oct 2025

Technical Lead I - VLSI PD CAD

Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis... Verificatione. Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm...

Company: UST
Posted Date: 13 Sep 2025

Lead I - Embedded Software

suited design standards for embedded system product development system level validation and performance optimization... strategies. Outcomes: * Design develop and implement system level specifications. Develop highly optimized secured code...

Company: UST
Posted Date: 28 Aug 2025

Associate II - VLSI SC Char

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills...

Company: UST
Posted Date: 15 Aug 2025

Associate II - VLSI

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills...

Company: UST
Posted Date: 03 Aug 2025

Associate II - VLSI

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills...

Company: UST
Posted Date: 02 Aug 2025