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Keywords: DFT Engineer, Location: Karnataka

Page: 8

Senior SoC Physical Design Timing Engineer

to Understanding of Design, Architecture and Clocking, Interaction with FE/DFT/Verification teams, Writing constraints, understanding...

Company: Intel
Posted Date: 04 Feb 2026

Design Engineer II

with DFT, CDC, LEC, or formal verification tools ✓ Knowledge of UCIE (Die-to-Die) interfaces or analog design flows...

Posted Date: 04 Feb 2026

Senior Hardware Engineer

, and RoHS. ● Experience with design for manufacturing (DFM) and design for test (DFT) principles, ensuring efficient...

Company: Best NanoTech
Location: Karnataka
Posted Date: 02 Feb 2026

Junior Hardware Engineer

, and RoHS. ● Experience with design for manufacturing (DFM) and design for test (DFT) principles, ensuring efficient...

Company: Best NanoTech
Posted Date: 02 Feb 2026

Technologist Engineer, ASIC Development Engineering

, timing, low-power, DFT) using JTAG, trace, waveform capture, and performance counters. Power & GLS Validation: Run and debug...

Company: SanDisk
Posted Date: 31 Jan 2026

Senior Commissioning engineer

Certificate (FAC) is obtained. Achieve and maintain paint process parameters such as DFT, gloss, and color values, including...

Company: ABB
Posted Date: 31 Jan 2026

CPU Design Sr Lead Verification Engineer

-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture... and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump...

Company: Qualcomm
Posted Date: 31 Jan 2026

Senior PCB Design Engineer

for Manufacturability), DFA (Assembly), and DFT (Test) for multi-layer (30+ layers) rigid and rigid-flex board Experience of successfully...

Posted Date: 29 Jan 2026

Senior PCB Design Engineer

for Manufacturability), DFA (Assembly), and DFT (Test) for multi-layer (30+ layers) rigid and rigid-flex board Experience of successfully...

Posted Date: 29 Jan 2026

NPU/AI Processor Synthesis Sr Staff Engineer

-cycle paths, and false paths. Cross-Functional Collaboration Work closely with RTL design, DFT, and physical design...

Company: Qualcomm
Posted Date: 29 Jan 2026

Mechanical Program Lead Engineer

Focusing on Quality Improvements for ME Power Box Designs (Implementation of DMADV or any such methods) Driving DFMEA, DFR, DFT...

Company: Lam Research
Posted Date: 29 Jan 2026

Principal ASIC Design Engineer

requirements Understanding of DFT, Functional Safety (FuSa) Should have good analytical skills for debug work...

Company: onsemi
Posted Date: 20 Jan 2026

Principal Engineer, Physical Design

closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA...

Company: Intel
Posted Date: 15 Jan 2026

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...

Company: Intel
Posted Date: 15 Jan 2026

Principal Engineer - Memory Compiler Circuit Design

CMOS, semiconductor physics, DFT, Verilog/VHDL, scripting (Perl/Python/TCL). Tools: Cadence Virtuoso, Synopsys tools...

Company: Marvell
Posted Date: 14 Jan 2026

ASIC Design Engineer

, and chip life until production maturity. Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend...

Company: Best NanoTech
Location: Karnataka
Posted Date: 14 Jan 2026

Senior Engineer- RTL

-power design knowledge (UPF / CPF) Exposure to DFT and formal verification Work Experience Required Skills & Experience... knowledge (UPF / CPF) Exposure to DFT and formal verification...

Company: Quest Global
Posted Date: 09 Jan 2026

Senior Engineer, Digital Design

constraints to perform synthesis, DFT insertion and static timing analysis. Support DFT strategy and implementation...

Posted Date: 07 Jan 2026

Physical design Engineer

Analysis (STA), Design-for-Test (DFT), and Packaging/Power Integrity/Signal Integrity (PI/SI) to deliver high-performance... tools Cadence Innovus, PrimeTime, Voltus, Calibre Proficiency in UPF/CPF, DFT integration, and power-aware sign-off...

Company: Quest Global
Posted Date: 06 Jan 2026

Infra NOC (RTL)Design Engineer-Staff/Sr Staff

of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification, silicon debug Working...

Company: Qualcomm
Posted Date: 05 Jan 2026