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Keywords: DFT (Design For Test) Engineer, Location: San Jose, CA

Page: 2

ASIC Engineering Technical Leader

, production yield & DPPM support. Key Responsibilities: Responsible for development of the comprehensive Design-for-Test (DFT...) & DFx solutions and architectures that support ATE screening, in-system test, debug and diagnostics needs of the design...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 18 Oct 2025

Photonics Device Technologist

yield devices. Work with layout and test engineers to ensure Design for Test (DFT) which would enable device quality..._ THE ROLE: We are seeking a seasoned Photonics/Laser Design Engineer with expertise in taking white paper concepts...

Posted Date: 06 Aug 2025