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Keywords: Analog Layout Design Engineer, Location: Santa Clara, CA

Page: 2

Staff, Physical Design Engineer

for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement... and route, timing and power use, and verification or similarly for custom circuit design/layout flow. Utilizes tools...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 28 Feb 2026

Digital Design Engineer

in high speed and precision analog layout design for deep sub micron FinFET technologies. The opportunity: · Perform... custom analog layout design for high speed and precision analog circuits in advanced FinFET process technologies · Design...

Company: UST
Location: Santa Clara, CA
Posted Date: 07 Feb 2026
Salary: $87000 - 131000 per year

Power Integrity Validation Engineer, Board/System Design

, operations and quality assurance. As a member of the hardware engineer - Power design team, you will be working on various power... very closely with the hardware, layout and lab team for on board power supply design, review, characterization...

Location: Santa Clara, CA
Posted Date: 31 Jan 2026

Principal Mixed Signal Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal... and optical products. What You Can Expect Ownership of complex design blocks and complete analog macros. Design and develop...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Dec 2025
Salary: $165630 - 248100 per year

Senior PIC Design Engineer

solutions. What You Can Expect In this role, you will be a key part of the team responsible for the design and layout... at TSMC. ESSENTIAL DUTIES AND RESPONSIBILITIES Contribute to the design and layout of very large-scale Silicon Photonic...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 25 Feb 2026
Salary: $113900 - 168500 per year

Design Engineer - Sensors

and route, timing and power use, and verification or similarly for custom circuit design/layout flow. • Utilizes tools... for layout Power estimation and low-power design implementation Collaborating with Software Engineering and Systems Engineering...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 18 Jan 2026

Signal and Power Integrity Engineer

and SI requirements, actively guide layout engineer and manage tradeoffs in design. Ability to lead hardware design of an optical..., including high speed signal integrity, layout and able to direct layout engineer with clear design priority high density...

Company: Intel
Location: Santa Clara, CA
Posted Date: 28 Feb 2026

Optical Engineer, Advanced Photonic IC Development

. An engineer in this team will be responsible for all aspects of engineering design and transfer to production of advanced optics... with cross-functional teams consisting of Digital and Analog Circuit designers, Signal/Power Integrity, and substrate layout...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 18 Feb 2026
Salary: $158600 - 237600 per year

Silicon Photonics Advanced Development Engineer

. An engineer in this team will be responsible for all aspects of engineering design and transfer to production of advanced optics... with cross-functional teams consisting of Digital and Analog Circuit designers, Signal/Power Integrity, and substrate layout...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 17 Feb 2026
Salary: $158600 - 237600 per year

Senior Electrical Engineer – R&D Robotics

in Altium Designer or related CAD tool for schematics and PCB layout. Experience designing and developing complex analog...: Analog Design, Debugging, Digital Electronics Design, Digital System Design, Multilayer PCB Design Preferred Skills...

Location: Santa Clara, CA
Posted Date: 16 Feb 2026

Electrical Engineer - R&D Robotics

: Analog Design, Debugging, Digital Designs, Electronic Testing, PCB Layout Design Preferred Skills: Assembly Operations... for schematics and PCB layout. Experience designing and developing sophisticated analog and digital electrical systems...

Location: Santa Clara, CA
Posted Date: 15 Feb 2026
Salary: $87000 - 140300 per year

Principal Applications Engineer

of high-speed schematic and design layout (PCB layout, signal integrity, board assembly, and manufacturing). Familiarity...-on Principal Applications Engineer who is passionate about solving complex technical challenges and delivering exceptional...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Feb 2026
Salary: $154680 - 231700 per year

Senior Staff Optical Engineer, Validation

flow and design automation. Collaborate with cross-functional teams consisting of Digital and Analog Circuit designers..., Signal/Power Integrity, and substrate layout, and system design team. Responsibility changes from time to time depending...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 25 Jan 2026
Salary: $130740 - 195800 per year

Electronics & Semiconductor Engineer

are the same. Job Description About the Job You're Considering We're seeking an Electrical Design Engineer..., ideally in network security or telecommunications.Strong foundation in analog and digital circuit design principles...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 17 Jan 2026
Salary: $58900 - 130000 per year

Senior Staff Hardware Engineer - Optical

board fabrication and design, and analog / RF signaling. This role will also use high speed test equipment such as VNA... under various operating conditions and validates the performance of the hardware, firmware, and control loops. An engineer...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Jan 2026
Salary: $130740 - 195800 per year

Optical Engineer, Senior Staff

of next generation photonics design flow and design automation. Collaborate with cross-functional teams consisting of Digital and Analog... Circuit designers, Signal/Power Integrity, and substrate layout, and system design team. Responsibility changes from time...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Jan 2026
Salary: $130740 - 195800 per year

SerDes Validation Senior Staff Engineer

interfaces is an asset. Knowledge of board design, board schematics and board layout, and signal integrity... and automated test suites to characterize the analog interfaces over process voltage and temperature (PVT) extremes to determine...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Jan 2026
Salary: $121400 - 181800 per year

Silicon Photonics Validation Engineer

-functional teams consisting of Digital and Analog Circuit designers, Signal/Power Integrity, and substrate layout, and system... for design, verification, and validation of these integrated high speed optical components. The team performs system level...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Jan 2026
Salary: $130740 - 195800 per year

Senior Staff Physical Verification CAD engineer - EDA Tools

working closely with design and layout teams to ensure the integrity and performance of Marvell's advanced semiconductor... and analog IC design, verification, and physical implementation. Tool Integration: Integrate various EDA tools...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Dec 2025
Salary: $124420 - 186400 per year

Sensor Characterization Engineer

with analog/digital design team to troubleshoot chip/system level performance issues; Support R&D teams by providing detailed... in: Integrated CMOS analog/digital systems, analog IC design, CMOS logic design, integrated circuit analysis, sensors. Digital...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 19 Dec 2025
Salary: $156853 - 160000 per year