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Keywords: Analog/Mixed-Signal IC Layout Engineer (Senior Level), Location: San Jose, CA

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Senior High-Speed Analog Layout Engineer

Senior High-Speed Analog Layout Engineer Locations: Irvine, San Jose, Austin or remote US Citizen or US Permanent... layout design of complex analog/mixed-signal macros (e.g., ADCs, DACs, PLLs), from floor planning through final verification...

Location: San Jose, CA
Posted Date: 29 Jan 2026

Senior Failure Analysis Engineer (automotive)

customers. Requirements: Experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices...The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA...

Posted Date: 25 Jan 2026

Senior Failure Analysis Engineer (automotive)

customers. Requirements: Experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices...The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA...

Posted Date: 25 Jan 2026

Senior Failure Analysis Engineer (automotive)

customers. Requirements: Experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices...The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA...

Company: KOB Solutions
Location: San Jose, CA
Posted Date: 25 Jan 2026

Senior Failure Analysis Engineer (automotive)

customers. Requirements: Experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices...The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA...

Location: San Jose, CA
Posted Date: 25 Jan 2026

Senior Failure Analysis Engineer (automotive)

customers. Requirements: Experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices...The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA...

Posted Date: 24 Jan 2026

Field Application Engineer (SEG; San Jose, CA;)

-Speed Digital, System on Chip, Mixed Signal and Analog semiconductor devices. Test program software development, often..., High-Speed Digital, High-Power Computing, System on Chip, Mixed Signal, or Analog testing and test development...

Company: Teradyne
Location: San Jose, CA
Posted Date: 30 Jan 2026
Salary: $104000 per year

Field Application Engineer (SEG, San Jose or Phoenix)

on Chip, Mixed Signal, or Analog testing and test development on ATE (Automated Test Equipment) platforms Preferred... Field Application Engineer in ATE (Automated Test Equipment) and SLT (System Level Testing), who will work collaboratively...

Company: Teradyne
Location: San Jose, CA
Posted Date: 18 Dec 2025
Salary: $97800 - 156400 per year

Field Applications Engineer- ATE & SLT (SEG, San Jose)

on Chip, Mixed Signal, or Analog testing and test development on ATE (Automated Test Equipment) platforms Preferred... Field Application Engineer in ATE (Automated Test Equipment) and SLT (System Level Testing), who will work collaboratively...

Company: Teradyne
Location: San Jose, CA
Posted Date: 23 Nov 2025
Salary: $139400 per year

Field Application Engineer (SEG, San Jose)

-Speed Digital, System on Chip, Mixed Signal and Analog semiconductor devices. Test program software development, often... in Digital, High-Speed Digital, High-Power Computing, System on Chip, Mixed Signal, or Analog testing and test development...

Company: Teradyne
Location: San Jose, CA
Posted Date: 21 Nov 2025
Salary: $170500 per year

Field Application Engineer (SEG, San Jose)

-Speed Digital, System on Chip, Mixed Signal and Analog semiconductor devices. Test program software development, often... experience in Digital, High-Speed Digital, High-Power Computing, System on Chip, Mixed Signal, or Analog testing and test...

Company: Teradyne
Location: San Jose, CA
Posted Date: 21 Nov 2025