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Keywords: ASIC Physical Design and Timing Engineer, Location: Santa Clara, CA

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Physical Design Methodology Engineer

collaterals PREFERRED EXPERIENCE: Experience in ASIC Physical Design and/or CAD development Hands-on experience with Place... related to Artificial Intelligent/ High Performance Computing SOCs . As a member of the Physical design and SOC teams...

Posted Date: 09 Nov 2025

Physical Design Engineer Intern - Bachelor's Degree

, Static Timing Analysis, Physical Verification, etc.). What You Can Expect One or more of the following: Block lever... floorplan, place and route, timing analysis/closure, ECO implementation. Power grid or custom route. Physical verifications...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 Oct 2025
Salary: $27 - 55 per hour

Principal Technical IP Engineer - Manage 3rd Party IP Integration - DDR/LPDDR/GDDR/HBM/eMMC memory

required for releasing a chip to fabrication including logic synthesis, physical design, timing, DRC/LVS, Formal verification and electrical.... Proficient in project management tasks required to manage 3rd party developers. Broad-based exposure to ASIC design flows...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Nov 2025
Salary: $143200 - 214500 per year

Integration Engineer

engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design... constraints (SDC files). • Timing Closure: Work closely with physical design and STA teams to achieve timing closure at top level...

Company: Apple
Location: Santa Clara, CA
Posted Date: 07 Nov 2025
Salary: $126800 - 190900 per year