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Keywords: ASIC Methodology Engineer, Location: Santa Clara, CA

Page: 2

Senior Memory Controller Verification Engineer

like Debussy, GDB). Background with System Verilog and UVM based methodology for ASIC verification. Ways to stand out from the...NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Custom SOC IP Verification Engineer

a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI...NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Jan 2026

IP Design Verification Engineer

your career. THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team..., industry-leading technologies to market. You will participate in design verification methodology definition as well...

Posted Date: 25 Dec 2025

GPU Design Verification Engineer

Maintains and improves existing functional verification infrastructure and methodology Participates in the definition... and strong programming skills in System Verilog, OVM and UVM Hands on verification experience working on ASIC, CPU or GPU Test Plan...

Company: Intel
Location: Santa Clara, CA
Posted Date: 15 Feb 2026

GPU Design Verification Engineer

Maintains and improves existing functional verification infrastructure and methodology Participates in the definition..., OVM and UVM Hands on verification experience working on ASIC, CPU or GPU Test Plan development experience at IP level...

Company: Intel
Location: Santa Clara, CA
Posted Date: 15 Feb 2026

AI ML Engineer, RTL Power Optimization – New College Grad 2026

, micro-architecture, RTL Design, methodology and AI based power optimization solutions. You will collaborate with Architects..., Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026
Salary: $116000 - 189750 per year

Senior Principal Engineer, Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Senior Staff Engineer, Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $89360 - 133900 per year