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Keywords: ASIC Design Engineer, Location: Bangalore, Karnataka

Page: 4

Design verification engineer

As a Design verification engineer in the Data Processing Unit team you will be validating silicon to solve complex... problems in a datacenter. Lead key components of functional validation of complex ASIC SOC using UVM/C test bench Perform Pre...

Company: Microsoft
Posted Date: 10 Dec 2025

Staff Engineer, Physical Design Engineering

Business Unit (DBU) is seeking a Senior Physical Design Engineer to lead the development of complex mixed-signal SoCs... and high-performance signal processing hardware. The role involves end-to-end physical implementation of ASIC/SoC designs...

Posted Date: 06 Dec 2025

FPGA Design Verification Engineer

and tools. Required Skills: Strong understanding of FPGA, ASIC, RTL design principles and architectures. Proficiency... Verification Engineer to join our dynamic team, working on state of the art technologies. In this role, you will be responsible...

Company: UST
Posted Date: 27 Nov 2025

Principal Physical Design Engineer

Digital Physical Design Engineer Role Overview A Principal Digital Physical Design Engineer will own and execute the... or a related discipline. 10+ years’ hands-on experience in all aspects of digital physical design for ASIC/SoC development...

Posted Date: 21 Nov 2025

WIFI PHY Senior Design Verification Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.... General Summary: QCT's Bangalore Wireless R&D (WRD) HW team in Bangalore is looking for experienced Wireless HW design...

Company: Qualcomm
Posted Date: 13 Nov 2025

Design Engineer

Position : Design Engineer Experience : 3 7 Years Location : Bangalore Notice Period : immediate / 15 Days NP... Skillset Required: Proficient in RTL Verification using SystemVerilog (SV) and UVM. Strong knowledge of FPGA Design Flow...

Posted Date: 12 Nov 2025

RTL Design Engineer

(CDC, Lint, X-prop) on the design and cleaning up design issues is mandatory One or two FPGA RTL projects are OK, but the... remaining projects must be ASIC RTL projects Synthesis and constraint writing experience is good to have, but not mandatory...

Company: Proxelera
Posted Date: 28 Jan 2026

BT - Design Verification Sr Lead Engineer

team is looking for experienced Wireless HW design verification engineers to work on Qualcomm's best in class chipsets... for mobile phones, wearables and IOT. Candidate will be working with ASIC designs on the latest technology nodes. This role...

Company: Qualcomm
Posted Date: 24 Jan 2026

Senior Design Verification Engineer

for block / sub-system level verification. Work with design team in generating test-plans and closure of code and functional... such as design quality, robustness of Design Verification (DV) practice, ease of DV environment integration and make recommendations...

Posted Date: 15 Jan 2026

Frond End Design- STA Engineer

your career. THE ROLE: In this role, you will be responsible for driving low-power design strategies, synthesis, and timing...), ensuring efficient, reliable silicon that meets product requirements. THE PERSON: You are passionate about digital design...

Posted Date: 15 Jan 2026

Principal Engineer, Physical Design

Job Details: Job Description: • Lead Structural Design / physical design Implementation of Custom IP and SoC designs... from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow...

Company: Intel
Posted Date: 15 Jan 2026

Fellow Silicon Design Engineer

; harmonize processes, reviews, and sign-off standards. Partner with design/architecture/validation to align requirements... in verification technology. Preferred Qualifications 20+ years in ASIC/IP verification with deep expertise in high-speed...

Posted Date: 14 Jan 2026

Principal Engineer, Systems Design and Architecture

core/HW environment Multi-disciplinary experience, including familiarity with Firmware and ASIC design Experience...

Company: SanDisk
Posted Date: 13 Jan 2026

SoC Physical Design Engineer

sign-off Qualifications: 7+ years of experience in ASIC physical design flow and methodologies in 3/5 and 7nm process...Job Category: Applied R&D Degree Level: Bachelor's degree Job Description: You will work on physical design...

Company: Nokia
Posted Date: 09 Jan 2026

Senior Design Engineer - Memory Subsystem

and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB). Deep understanding of ASIC design flow...NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of a team working...

Company: Nvidia
Posted Date: 07 Jan 2026

Physical design Engineer

, power-efficient silicon Required Qualifications 10–15+ years in ASIC/SoC physical design with multiple... About the Role Looking for a experienced Full Chip Lead to own and drive the entire physical design flow for SoCs. This role...

Company: Quest Global
Posted Date: 06 Jan 2026

IP Design Verification Engineer

to manage complex verification projects across global teams. You will collaborate with architecture, design, firmware... and ensure timely milestone completion Work closely with design, architecture, and post-silicon teams to resolve issues...

Company: Intel
Posted Date: 19 Dec 2025

Sr Staff Design Verification Engineer (DDR/LPDDR/HBM)

segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise/Career solutions including the... design architecture and design implementation specifications to create verification test plans. Programming in System...

Company: Marvell
Posted Date: 18 Dec 2025

Senior Engineer, Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Posted Date: 13 Dec 2025

Senior Principal Engineer, Physical Design

in major foundries. Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure. In-depth... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 13 Dec 2025